A Compact Analogue Radial Basis Function Circuit

Gillian Marshall and Steve Collins DRA Malvern, UK INTRODUCTION In this paper we describe an analogue VLSI circuit which implements the Radial Basis Function (RBF) algorithm, based around a compact Euclidean Distance calculator. A prototype chip has been fabricated and tested. First, we describe the RBF architecture and present results from the test chip. We then discuss the impact of device variations, which traditionally cause problems for analogue systems. Finally, we discuss the scaling of our results from the small test chip to a full-sized RBF system. RBF ARCHITECTURE In the Radial Basis Function (RBF) algorithm the outputs, Oj , are generated as linear combinations of non-linear functions, , usually referred to as centres or kernels. The argument of each centre i depends upon the distance between the input vector x and a reference vector yi, Oj =Xi wij (jjx yijj; i) + bj (1) where wij is the weight between centre i and output j, i is the width of the ith centre, and bj is a bias term. The RBF algorithm has two features which make it particularly suitable for an analogue implementation. Firstly, the algorithm is adaptive, and this fact can be used in conjunction with \chip-in-the-loop" training and analogue oating-gate devices to compensate for device variations. Secondly, the independent nature of the calculations implies that a highly parallel, high speed implementation can be achieved. Figure 1 shows the oorplan of an analogue RBF chip. The input vector x is presented in parallel to a set of Euclidean distance cells, each of which calculates the distance between x and a stored vector y. These distances are then passed through a non-linearity, and into a matrix of multipliers. The output vector is then formed y y 1m